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multiple-cycle instruction

См. также в других словарях:

  • Instruction set — An instruction set, or instruction set architecture (ISA), is the part of the computer architecture related to programming, including the native data types, instructions, registers, addressing modes, memory architecture, interrupt and exception… …   Wikipedia

  • Cycle — Contents 1 Chemistry 2 Economics 3 Mathematics 4 Music …   Wikipedia

  • Instruction step — An instruction step is a method of executing a computer program one step at a time to determine how it is functioning. This might be to determine if the correct program flow is being followed in the program during the execution or to see if… …   Wikipedia

  • Reduced instruction set computer — The acronym RISC (pronounced risk ), for reduced instruction set computing, represents a CPU design strategy emphasizing the insight that simplified instructions which do less may still provide for higher performance if this simplicity can be… …   Wikipedia

  • Very long instruction word — or VLIW refers to a CPU architecture designed to take advantage of instruction level parallelism (ILP). A processor that executes every instruction one after the other (i.e. a non pipelined scalar architecture) may use processor resources… …   Wikipedia

  • Cycles per instruction — In computer architecture, cycles per instruction (aka clock cycles per instruction, clocks per instruction, or CPI) is a term used to describe one aspect of a processor s performance: the number of clock cycles that happen when an instruction is… …   Wikipedia

  • Cycles Per Instruction — In computer architecture, Cycles per instruction (clock cycles per instruction or clocks per instruction or CPI) is a term used to describe one aspect of a processor s performance: the number of clock cycles that happen when an instruction is… …   Wikipedia

  • Explicitly parallel instruction computing — (EPIC) is a term coined in 1997 by the HP Intel alliance [cite web url = http://www.hpl.hp.com/techreports/1999/HPL 1999 111.pdf title = EPIC: An Architecture for Instruction Level Parallel Processors accessdate = 2008 05 08 last = Schlansker and …   Wikipedia

  • Instructions Per Cycle — In computer architecture, Instructions Per Clock (Instruction Per Cycle or IPC) is a term used to describe one aspect of a processor s performance: the average number of instructions executed for each clock cycle. It is the multiplicative inverse …   Wikipedia

  • Intelligence cycle security — This article is part of a series under the intelligence cycle management, and deals with protection of the intelligence cycle. For a hierarchical list of articles, see the intelligence cycle management hierarchy. National intelligence programs,… …   Wikipedia

  • America's Next Top Model, Cycle 6 — Promotional photograph of the cast of Cycle 6 of America s Next Top Model …   Wikipedia

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